張寿峰 · Shoufeng Zhang

壹About

I'm an incoming second-year student at the University of Hong Kong, under the Faculty of Engineering. Prior to university, I studied at Beijing 101 High School. I am currently working on autonomous robotics and security. My broader interests span hardware-software co-design, edge deployment of intelligent systems, and the system-level questions that arise when autonomous systems leave controlled environments and meet the real world. I am drawn to research at the intersection of perception, planning, and the hardware constraints that make both hard.

「莫聽穿林打葉聲，何妨吟嘯且徐行。竹杖芒鞋輕勝馬，誰怕？一蓑煙雨任平生。」

貳Education

  • 2025.9 – Present
    The University of Hong KongB.Eng., Elite Engineering Programme
    • CGPA: 3.96/4.3. (Major CGPA: 4.15/4.3)
    • 2025-26 The University of Hong Kong Entrance Scholarship
    • Core Courses: Multivariable Calculus and Linear Algebra, C++ & Python Programming, Electricity and Electronics, Fundamental Mechanics, etc.
  • 2024.7
    Carnegie Mellon UniversitySummer Session
    • QPA: 4.0 / 4.0
    • Core Courses: Principles of Imperative Computation (C Programming, Basic data structure and algorithms), Concepts of Mathematics (Discrete Math)
  • 2022.9 – 2025.7
    Beijing 101 High SchoolAP & IB Diploma Programme

叁Experience & Works

01
2025.12 – Present · Research Assistant

HKU Innovation Academy Research Assistant

  • Developed the full sensor integration and autonomy stack for a museum guide robot. Resolved severe odometry drift caused by the corridor effect in featureless hallways and dynamic crowd occlusion by integrating FAST-LIO (LiDAR-inertial odometry); implemented localization via ICP and navigation via Nav2.
Robotics
02
2025.12 – 2026.5 · Research Assistant

HKU JC STEM Lab of Intelligent Cybersecurity Research Assistant

  • Co-developed RE-Agent: an automated reverse-engineering pipeline built on Ghidra and DeepSeek that mimics the cognitive strategies of human reverse engineers for vulnerability analysis of stripped binaries.
  • Replaced naive LLM prompting with progressive context enrichment using BFS exploration of caller/callee graphs and iterative hypothesis testing, achieving a 9 increase in semantic function name-recovery accuracy.
  • Contributed to validation of AI-generated exploit reports;
Security
03
2024 · Project Leader

Hardware-Accelerated 1-Bit Quantization Using PyRTL

  • Designed a 1-bit MAC unit for a Systolic Array with PyRTL, reducing area requirements and critical path length for efficient neural network design.
PyRTLSystem DesignQuantization
04
2024 · Participant

Yishengyizhen Program, Chinese Academy of Sciences

  • Explored computer architecture and systems. Designed circuits with Verilog/Vivado for RV32 instructions and built a simplified RV32I emulator in C.
VerilogVivadoCRISC-V

伍Skills

Hardware & Systems

  • Verilog / SystemVerilog
  • Vivado / FPGA Prototyping
  • PyRTL
  • RISC-V ISA
  • Computer Architecture

Software & ML

  • C / C++
  • Python
  • Machine Learning
  • Quantization / NN Accelerators
  • Data Analysis (LDA, LDAvis)

Exploring

  • Robotics Learning
  • AI for Security
  • Operating Systems
  • Compilers
  • ML Hardware Accelerators

陸Contact

Feel free to reach out.

Emailzhangshoufeng@connect.hku.hkGitHub@shawnzsfRedNotePhotography & more